This invention pertains generally to detection of peaks of an input voltage signal, and more specifically to a means of providing a logic signal which accurately indicates the occurrence of a peak of the input signal, while ignoring peaks of noise accompanying the input signal.
Detection of voltage signal peaks is frequently accomplished by transforming peaks of the input signal into zero crossings of signals within a peak detector, and by then sensing the occurrence of these resultant zero crossings. The transformation of input signal peaks into zero crossings is typically accomplished by applying a 90.degree. phase shift to the input signal using integration or differentiation. Noise rejection is often accomplished by the use of threshold detection, but threshold detection becomes difficult in a system such as a magnetic tape reading circuit where the input signal level and the noise level both change with changes in the speed of the magnetic tape. In order to assure continued rejection of noise while still detecting input signal peaks when such a change in tape speed occurs, prior art threshold detection circuits have required complex circuitry to set the threshold of detection to a new level.
Peak detectors constructed according to the prior art have generally been susceptible to noise consisting of transient voltage spikes, such as might occur when switching logic is located in close physical proximity to such a peak detection circuit. The amplitude of the spikes is often comparable to the amplitude of the signal peaks that must be detected, thus making detection very difficult. Integration can be used to substantially reduce the effect of these spikes, since, even though the amplitude is large, the integrated value of the transient over time is small due to the brief duration of the transient. Integrators, however, produce a slowly varying D.C. component as part of their output waveforms. Prior art peak detectors which merely compare the integrator output signal to a fixed ground or reference level are disadvantageous in that they are susceptible to detection errors caused by this slowly varying D.C. component. Such errors may arise because some peaks may not be detected at all if the slowly varying D.C. component is sufficiently large. Additional errors may result because this slowly varying D.C. component causes some peaks to be detected either earlier or later in time than their actual time of occurrence. These latter errors are unacceptable in those situations sensitive to the time of occurrence of a peak.
To improve noise rejection, many peak detector circuits which detect zero crossings corresponding to peaks of the input signal have been arranged to introduce hysteresis within an associated comparison circuit so that, for example, a positive-going zero crossing activates a comparator only when the signal being detected reaches a certain positive level, and a negative-going zero crossing activates a comparator only when the signal being detected reaches a certain negative level. This hysteresis reduces the likelihood of indicating multiple peaks caused by noise on the signal at the detection point. In addition, the use of a non-zero detection point created by hysteresis reduces the possibility that mere noise will activate the comparison circuit. Prior art peak detectors have required either two comparators or a single comparator in combination with a rectifier to achieve hysteresis in the comparison circuit, thus resulting in more complex circuitry.
It is therefore an object of this invention to provide a simplified circuit to detect the occurrence of peaks of an input voltage signal. It is a further object of this invention to provide such a peak detector circuit having a high degree of noise immunity, including immunity from noise consisting of transient voltage spikes of amplitude comparable to the peak amplitude of the input voltage signal. These objects are accomplished in accordance with the preferred embodiment of the invention by employing an integrator, a D.C. tracking circuit, and a zero-crossing detection circuit using only a single comparator.
The integrator simultaneously filters both low and high frequency noise appearing on the input signal, and reduces the effect of transient voltage spikes by integrating them with respect to time. The integrator circuit also applies a 90.degree. phase shift to the input signal to create a zero crossing at the integrator output which is coincident with a peak of the input signal. The signal level of the integrator output remains relatively constant even when the amplitude of the input signal changes due to a change in speed of a magnetic tape containing information in the form of flux reversals on the tape, for example.
The D.C. level, as well as any low frequency noise, present at the integrator output is sampled and dynamically updated by the D.C. tracking circuit to provide a reference level that allows a more accurate determination of the point at which a zero crossing of the integrator output, corresponding to a peak of the input signal, occurs.
The point at which the zero crossing occurs is sensed by the zero-crossing detection circuit, which compares the integrator output signal to the D.C. level detected by the D.C. tracking circuit. The zero-crossing detection circuit produces a logic level transition at its output to indicate detection of a peak of the input signal. Noise immunity of the peak detector circuit may be improved by employing a single comparator and positive feedback within the zero-crossing detection circuit to introduce hysteresis.